transistor is saturated, the other must be cut off. The flip-flop is stable in this state. The capacitors that were removed from figure 3-19 must be returned to the flip-flop as shown in figure 3-22 to change the state of the flip-flop from one condition to the other. Capacitors C3 and C4 transmit almost instantaneously any changes in voltage from the collector of one transistor to the base of the other. Capacitors C1 and C2 are input coupling capacitors. ">
The capacitors that were removed from figure 3-19 must be returned to the flip-flop as shown in figure 3-22 to change the state of the flip-flop from one condition to the other. Capacitors C3 and C4 transmit almost instantaneously any changes in voltage from the collector of one transistor to the base of the other. Capacitors C1 and C2 are input coupling capacitors.
Figure 3-22. - Flip-flop.
As before, assume that transistor Q1 is saturated and transistor Q2 is cut off. Two methods are available to cause the flip-flop to change states. First, a positive-going pulse can be applied to input 1 to cause Q1 to change from saturation to cutoff. Second, the same result can be achieved by applying a negative-going pulse to input 2. Transistor Q2 would then change from Cutoff to saturation. Normally, a pulse is applied to the saturated transistor causing it to cut off. An input pulse which is of the correct polarity to change the state of the flip-flop is, as before, called a trigger pulse.
In figure 3-23 a positive-going trigger pulse has been applied to input 1. The flip-flop has now changed states; Q1 is cut off and Q2 is saturated. If a second positive-going trigger pulse is applied to input 1, it has no effect. This is because Q1 is already cut off; therefore, a positive pulse on its base has no effect. But if a positive-going trigger pulse were applied to input 2, the flip-flop would change back to its original state as shown in figure 3-24.
Figure 3-23. - Bistable multivibrator (flip-flop).
Figure 3-24. - Flip-flop (original state).
So far, the basic flip-flop has used only pnp transistors. It could have just as easily used npn transistors. The functional operation would not change; only the polarities required for conduction and cutoff change. As a technician, you may see either type of transistor used, npn or pnp. A symbolic block diagram is sometimes used to avoid confusion about voltage polarities.
A special kind of block diagram has been adopted as a standard symbol for the flip-flop and is shown in figures 3-25 and 3-26. The two inputs are represented by the lines on the left and the outputs by the lines on the right. INPUTS to a flip-flop are S (SET) and C (CLEAR) and OUTPUTS from a flip-flop are "1" and "0." A trigger pulse applied to the SET input causes the "1" output to be a positive or negative voltage, depending on the type of transistor. At the same time, the "0" output equals 0 volts. This condition is called the SET STATE.
Figure 3-25. - Flip-flop (SET state).
Figure 3-26. - Flip-flop (CLEAR state).
If a trigger pulse is applied to the CLEAR input, a positive or negative voltage is produced at the "0" output. The "1" output goes to 0 volts. This condition is called the CLEAR STATE, as shown in figure 3-26.
To determine what state the flip-flop is in, you can measure either the "1" or the "0" output. Measuring 0 volts at the "1" output indicates that the flip-flop is in the CLEAR state. If the "0" output is measured, a positive or negative voltage would also indicate that the flip-flop is in the CLEAR state. Either way, only one reading is necessary.
In figure 3-27, the flip-flop is in the SET state prior to T0 (negative voltage on the "1" output). Now compare the changes in output voltage at each point in time (T0, T1, T2, and T3) with the input pulse. Studying this figure should help you understand how the flip-flop works. The positive pulse at T0 on the CLEAR input shifts the f/f to the CLEAR state (negative voltage at the "0" output). At T1 a positive pulse on the SET input drives the "1" output to the SET state. At T2 a positive pulse on the CLEAR input drives the "0" output to a CLEAR state. At T3 another positive pulse is applied to the CLEAR input. This input has no effect since the f/f is already in the CLEAR state.
Figure 3-27. - Flip-flop with trigger pulse on SET and inputs.
Some flip-flops use a third input lead, as shown in figure 3-28. This third input lead is called a TOGGLE (T) input. Every time a pulse is applied to the T input, the flip-flop will change states from whatever its state was previously. The two diodes (CR1, CR2) form a STEERING NETWORK. This steering network directs a positive input pulse to the saturated transistor, causing it to cut off. Negative pulses are blocked by the diodes. Note that if npn transistors were used, the diodes would have to be reversed and the TOGGLE signal would have to be negative. For example, assume that Q1 is saturated, Q2 is cut off, and a positive pulse is applied the at T input. The input pulse will be directed to both transistors. The positive pulse will not affect Q2 since it is already in cutoff. Q1 however, which is conducting, will cut off and will cause Q2 to become saturated. The transistors have reversed states. A block diagram which represents a multivibrator and its outputs with only a TOGGLE input signal is shown in figure 3-29. Studying this figure should help you understand how this flip-flop works.
Each TOGGLE input causes the output to change states. Figure 3-30 shows what happens when triggers are applied to all three inputs of the flip-flop shown in figure 3-28. Assume that the flip-flop in figure 3-30 is in the CLEAR state ("1" output is 0 volts, "0" output is high) prior to T0. At T0 a trigger is applied to the set input and the flip-flop changes states. Next, the CLEAR input is triggered and the flip-flop returns to the CLEAR state at T1. A TOGGLE at T2 causes the flip-flop to change state, so it is once again SET. Another TOGGLE changes the flip-flop to the CLEAR state at T3 (notice that TOGGLE triggers flip the multivibrator regardless of its previous state). Now, a SET input trigger at T4 sets the flip-flop. The CLEAR input pulse at T5 causes the circuit to CLEAR, and the CLEAR input at T6 has no effect on the flip-flop, for it is already in the CLEAR state.
Figure 3-28. - Flip-flop with three inputs.
Figure 3-29. - Block diagram of a flip-flop with a toggle input.
Figure 3-30. - Flip-flop with three inputs (block diagram).
Remember, a SET input will SET the flip-flop if it is in the CLEAR state, otherwise, it will not do anything; a trigger at the CLEAR input can only CLEAR the circuit if it is SET; and a trigger applied to the TOGGLE input will cause the bistable multivibrator to change states regardless of what state it is in.
Q.7 In a bistable multivibrator, how many trigger pulses are needed to produce one
complete cycle in the output?
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