Quantcast Bistable Multivibrator

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Bistable Multivibrator

As the name implies, the bistable multivibrator has two stable states. If a trigger of the correct polarity and amplitude is applied to the circuit, it will change states and remain there until triggered again. The trigger need not have a fixed prf; in fact, triggers from different sources, occurring at different times, can be used to switch this circuit.

The bistable multivibrator circuit and the associated waveforms are shown in figure 3-17, views (A) and (B), respectively. In this circuit, R1 and R7 are the collector load resistors. Voltage dividers R1, R2, and R5 provide forward bias for Q2; R7, R6, and R3 provide forward bias for Q1. These resistors also couple the collector signal from one transistor to the base of the other. Observe that this is direct coupling of feedback. This type of coupling is required because the circuit depends on input triggers for operation, not on RC time constants inside the circuit. Both transistors use common emitter resistor R4 which provides emitter coupling. C1 and C2 couple the input triggers to the transistor bases.

Figure 3-17A. - Bistable multivibrator and waveforms.

Figure 3-17B. - Bistable multivibrator and waveforms.

Notice that the circuit is symmetrical; that is, each transistor amplifier has the same component values. When power is first applied, the voltage divider networks place a negative voltage at the bases of Q1 and Q2. Both transistors have forward bias and both conduct.

Due to some slight difference between the two circuits, one transistor will conduct more than the other. Assume that Q1 conducts more than Q2. The increased conduction of Q1 causes the collector voltage of Q1 to be less negative (more voltage drop across R1). This decreases the forward bias of Q2 and decreases the conduction of Q2. When Q2 conducts less, its collector voltage becomes more negative. The negative-going change at the collector of Q2 is coupled to the base of Q1 and causes Q1 to conduct even more heavily. This regenerative action continues until Q2 is cut off and Q1 is saturated. The circuit is in a stable state and will remain there until a trigger is applied to change the state.

At T1, a negative trigger is applied to both bases through C1 and C2. The trigger does not affect Q1 since it is already conducting. The trigger overcomes cutoff bias on Q2 and causes it to conduct. As Q2 goes into conduction, its collector voltage becomes positive. The positive-going change at the Q2 collector causes a reverse bias on the base of Q1. As the conduction of Q1 decreases to the cutoff point, the collector voltage becomes negative. This switching action causes a very rapid change of state with Q2 now conducting and Q1 cut off.

At T2, a negative trigger is again applied to both bases. This time, Q1 is brought into conduction and the regenerative switching action cuts off Q2. The bistable multivibrator will continue to change states as long as triggers are applied. Notice that two input triggers are required to produce one gate; one to turn it on and the other to turn it off. The input trigger frequency is twice the output frequency.

The bistable multivibrator that most technicians know is commonly known by other names: the ECCLES-JORDAN circuit and, more commonly, the FLIP-FLOP circuit (figure 3-18). The flip-flop is a bistable multivibrator, "bi" meaning two; that is, the flip-flop has two stable states. The flip-flop (f/f) can rapidly flip from one state to the other and then flop back to its original state. If a voltmeter were connected to the output of a flip-flop, it would measure either a small positive or negative voltage, or a particularly low voltage (essentially 0 volts). No matter which voltage is measured, the flip-flop would be stable. Remember, stable means that the flip-flop will remain in a particular state indefinitely. It will not change states unless the proper type of trigger pulse is applied.

Figure 3-18. - Basic flip-flop.

Flip-flops are used in switching-circuit applications (computer logic operations) as counters, shift registers, clock pulse generators, and in memory circuits. They are also used for relay-control functions and for a variety of similar applications in radar and communications systems.

Notice that the basic flip-flop, illustrated in figure 3-18, has two inputs and two outputs. The inputs are coupled to the bases of the transistors and the outputs are coupled from the collectors of the transistors. Think of the flip-flop as two common-emitter amplifier circuits, where the output of one amplifier is connected to the input of the other amplifier, and vice-versa. Point (D) is connected through R4 to C4 to point (A). Point (A) is the input to transistor Q1. By the same token, point (C), which is the output of Q1, is connected through R3 and C3 to the input (point (B)) of transistor Q2.

Taking a close look at the flip-flop circuit, you should be able to see how it maintains its stable condition. Typical values for the resistors and applied voltages are shown in figure 3-19. The capacitors have been removed for simplicity.

Figure 3-19. - Flip-flop (capacitors removed).

Two voltage-divider networks extend from -10 volts (VCC) to +6 volts (VBB). One voltage divider consisting of resistors R1, R4, and R6 supplies the bias voltage to the base of Q1. The other voltage divider consists of R2, R3, and R5 and supplies the bias voltage to the base of Q2.

Assume that Q1 (figure 3-20) is initially saturated and Q2 is cut off. Recall that the voltage drop from the base to the emitter of a saturated transistor is essentially 0 volts. In effect, this places the base of Q1 at ground potential. The voltages developed in the voltage divider, -VCC, R6, R4, R1, and +VBB, are shown in the figure.

Figure 3-20. - Flip-flop (Q1 voltage divider).

Since no current flows through Q2, very little voltage is dropped across R6 (approximately 0.5 volt). The voltage at output 2 would measure -9.5 volts to ground (approximately - VCC).

This voltage (-9.5 volts) is considered to be a HIGH output. Figure 3-21 shows the values of the other voltage-divider network.

Figure 3-21. - Flip-flop (Q2 voltage divider).

With Q1 saturated, a large current flows through R5. The meter would measure approximately 0 volts (ground potential) at point (C). Notice that point (B) is located between point (C) (at 0 volts) and +VBB (at +6 volts). The meter would measure a positive voltage (between 0 volts and +6 volts) at the base of Q2 (point (B)).




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