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Serial dirts bus loop closer self-test.  
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TM-5-6675-238-14 Theodolite: Directional: 0.002-MIL Graduation: 5.9 In. Long Telescope Detachable Tribrach: w/Accessories and Tripod Manual
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Figure 6-3. Signal Procesor Unit Power Supply Functional Block Diagram



ARMY  TM  5-6675-238-14 MARINE CORPS TM 08839A-14/1 is normally operated. The output signals are wrapped back into the SPU by connecting cable W204 into SPU test connector J11. Special bit circuitry then checks the amplitude and phase shift of each signal for roll Xl, roll X8,  heading  Xl,  heading  X32,  and  pitch  Xl.  If  the amplitudes and phase shifts are within tolerance, the loop  closer  circuitry  is  considered  good.  In  addition,  a precision  amplitude-ratio  self-test  is  performed  on  the heading Xl signals, Since the signals do not require any scaling in the driver circuits, they can be tested without using  precision  scaling  components  for  self-test,  Several amplitude-ratio tests are sufficient to assure that the digital/resolver  and  digital/synchro  circuitry  is  operat- ing properly and is within tolerance limits. A no-go on this test faults the entire digital/resolver and digital/ synchro loop closer circuit. A local reference generator is used in the SPU to generate 26 VAC, 400 Hz for this self-test. (9) Digital/DC loop closer self-test.  The  digital/ DC loop closer self-test is functionally illustrated in figure FO-15 and in contained on logic no, 2 electronic component assembly A2. BITE circuitry for the digital/ DC  loop  closer  self-test  are  self-test  tape  to  serial  data bus  conversion  logic,  V  lamp  analog  voltage,  compare logic,  and  voltage  check  circuit.  The  tape  reader  sends the  specific  address  to  activate  the  digital/DC  loop closer circuits. The tape reader then sends the specific 14-bit digital word that is to be converted to analog, Since the self-test tape data is made to look like the computer serial data bus, the self-test exercises the loop closer  circuitry  in  the  same  way  as  it  is  normally operated. The output signals are wrapped back to the SPU by connecting cable W204 into SPU test connector J11.  Special  bit  circuitry  then  checks  the  voltage  of each  analog  signal  and  compares  it  to  the  expected value, If all analog signals are within tolerance of the expected value, the loop closer circuitry is considered good. During self-test, command D1 signal causes a relay to energize, thereby connecting the lower gyro temperature signal to the output of the analog driver. This is to ensure that the relay is energizing properly. Command D2 signal energizes the compare logic for the V lamp signal. A comparison is made of the voltage on both sides of the relay. If they compare, the overall digital/DC  loop  closer  circuit  is  considered  operational and the tape reader is advanced to the next test. (10) Computer discrete loop closer self-test.  The computer discrete loop closer self-test is functionally illustrated in figure FO-16 and is contained on logic no. 3 electronic component assembly A3. BITE circuity for the computer discrete loop closer self-test are self-test tape to serial data bus conversion logic, SPU internal discrete voltage generator, and compare logic. The tape reader sends a specific address to activate the computer discrete  loop  closer  circuits,  When  the  SELF  TEST switch-indicator  is  activated,  the  SPU  internal  discrete voltage  generator  signals  are  applied  to  the  output discrete lines. The output discrete signals are listed in table 6-3. The SPU BITE logic applies the respective logic 1 signal to each of the output discrete lines. These lines  are  then  multiplexed  and  looped  back  into  the SPU and are checked by the compare logic to see that all lines are logic 1. For the voltage level checks, the rated value plus or minus 20 percent is considered to be a logic 1 condition. Voltages under 20 percent of the rated value are considered to be a logic 0 condition. If the logic 1 and 0 comparisons are correct, the computer discrete  loop  closer  self-test  is  considered  good, 1. SPU  Power  Supply.   The  SPU  power  supply generates  the  required  dc voltages for operation of the SPU, tape reader and buffer unit (during self-test), The power supply is functionally illustrated in figure 6-3. When the SPU ON switch-indicator is pressed to on, 115  VAC  turns  on  modular  power  supply  PS1,  The +28V generated by modular power supply PS1 ener- gizes  relay  Kl,  thus  applying  115  VAC  to  modular power  supplies  PS2,  PS3,  and  PS4  for  turnon.  To prevent damage from an overload condition, the output of  each  modular  power  supply  is  connected  to  an overvoltage protection circuit. 6-4. Buffer Unit Function.  The buffer unit is function- ally illustrated in figure 6-4. The buffer unit performs two  main  functions:  first,  conversion  of  the  bidirectional single ended data bus from the computer to a bidirec- tional,  differential,  high  drive  capability  data  bus,  suit- able for transmission over a 10-foot cable to the SPU; second, synchronization and retiming of various control signals.  The  buffer  unit  performs  the  conversion  of differential-to-single-ended  and  vice  versa  for  the  con- trol signals but does not permit control signals to be bidirectional with the exception of the read/input sig- nal. 6-5. Tape Reader, Part No. 877406-1, Function.  The tape reader contains the following functional circuits: lamp assembly, photocell assembly, drive system and control, step/run control, forward/reverse control, and power supply, The tape reader is functionally illustrated in figure 6-5. The following paragraphs describe each functional   circuit. a. Lamp Assembly . The lamp assembly consists of ~ . nine special filament-aligned incandescent lamps. These lamps  provide  light  for  the  photocells.  One  lamp  is positioned over each bit position. b. Photocell  Assembly.  Data  prepunched  into  the tape in a single-line, 8-bit character format is read by conversion  of  the  sensed  light  energy  into  electrical currents. The transmitted light is sensed through the nine  punched  holes  by  light-sensing  photovoltiac  silicon cells, The read head consists of nine photovoltaic cells used  as  current  sinks  when  illuminated.  These  cells provide the input to an associated photocell amplifier on the photocell amplifier plug-in circuit card. For  each light sensed (hole), the associated amplifier unit input 6-12 Change 1

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