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![]() ![]() (4) Set controls R23, R24, and R44 to
their midrange position (fig. 5-3).
c. Procedure.
(1) Connect the dc voltmeter test leads
cedures should be performed whenever it is necessary
to replace faulty (fig. 5-1 and 5-2) transistors.
between the right side of resistor
a. Initial Requirements.
R45 on the outer component board
(1) Be sure that a coating of heat-trans-
and to the left (negative) terminal
of dc voltmeter M2 (fig. 5-3).
ferring silicon grease is used between
the power transistor insulators and
(2) Connect the ac voltmeter test leads
their heat sink (applicable to tran-
to the terminals indicated in (1)
sistors Q7, Q10, and Q16 and pass-
above.
ing stages).
(3) Set the ac voltmeter dc range switch
(2) Check all terminals of transistor Q7,
to 50-volt range. (Set up the meter
for normal vacuum-tube voltmeter
Q10, or Q16 for continuity to the
best sink before connecting any wires
(vtvm) operation as described in TM
to the transistor collector, emitter,
11-6625-438-10.)
and base terminals. All elements of
(4) Set the ac voltmeter range switch to
the lowest ac volt range (0.001 volt).
these transistors should be electrical-
ly insulated from the heat sink as-
(5) Turn the power supply POWER
sembly.
switch S1 to ON.
(3) In replacing the passing stage power
(6) Adjust resistor R44 for a dc reading
of 6.0 to 6.1 volts on the dc voltme-
transistors, observe the same precau-
ter. The meter reading should be not
tions as described above. (All tran-
higher than 50 microvolt root mean
sistors must float above chassis
square (rms).
ground.)
(7) Connect the power supply power line
b. Initial Control Settings.
(1) Turn the COARSE ADJ. control fully
cord to the output of the variac. Use
Multimeter TS-352/U across the var-
counterclockwise (fig. 2-1).
iac secondary to monitor the ac volt-
(2) Loosen the shaft coupling setscrews
age.
between variac T1 and variable re-
(8) Connect the variac to a power source
sistor 30 (fig. 5-1).
and turn on the power supply POW-
(3) Set the FINE ADJ. control fully coun-
ER switch.
terclockwise (fig. 2-1).
5-7
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