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Page Title:
TABLE 2-5. TUNE CONTROL PWB GATE STATUS DURING TUNE OPERATION SEQUENCE |
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  TM 11-5820-921-40-1
TUNE CONTROL
TUNE CONTROL
PWB ASSEMBLY 1A4
PWB ASSEMBLY 1A4
GATE
GATE
PIN NO.
REF.DESIG.
REF. DESIG
PIN NO.
0
0
o
1
1
U1
4
1
U4
1
1
0*
0
0
1
5,6
0
0
2
1
1*
0
0**
0
1
0
0
3
8,9
0
0
1*
1
1
10
1
4
1
1
1
0*
1
1
1
5
0
1
1
11
0
0
1**
1
0
1
1
12
0
1
1
6
1*
1**
1
1
13
1
1
8
1
0
0*
9
1
1
1
1*
1
1
1
U2
1,2,6
1**
()*
1
1,2
1
0
U5
0
1
1
3
0**
1*
1
0
4
3
0
0
0
0
()*
4
1
1
1
5
1
1
1
1
1
1
5,6
0
0
8,12
0
0
0
0
9
1
1
0
0
8,9
0
0
1
1
1
0
10
1
10
0
1
1
0
1
11
1**
1
1
11
0
0
0
1
1
13
1
1
1
0
0
0
0
12
0
1**
1
13
1
1
1*
1,2
U3
1
0
1
0*
3
1
1
0
0
1
U6
1
0
0
1*
4
1
0
1
1
1
0
2
0*
1
1
0
1
0
5,11
0
1
3,5,6
1
1
6
4
0
0
1
o
0
0
0*
1
1
8,9
1
1
8
1*
1
1
1
1
10
0
9,11
1
1
1*
0
2,13
1
10,12
0
0
0
1
o
1**
1
13
1
1
0 = Logic Level Zero
LEGEND:
l=Logic Level One
*= Level Shown Exist for Most of Tune In Progress Sequence. Depending on frequency
Selected.
** = For a Short Interval at the Beginning of the Tune In Progress Sequence These Levels
are Opposite of the Level Shown
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