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  TM 11-6130-385-34
( 1 ) Measure and record distortion. Distortion
monitor terminals 22 and 18 as in A phase (para 3-
should be less than 6 percent.
13).
(2) Apply 125-watt load. Distortion should
3-15. A4 Board Test
remain under 6 percent.
a. For C phase data, monitor terminals 8 through
(3) Apply 250-watt load. Distortion should
1 1 with dual trace oscilloscope, for complementary
remain under 6 percent. Remove power and clip
pulse groups at a group repetition rate of 400 Hz. If
leads.
either signal is not present, repair before proceeding.
d. Test phase B and phase C as in A phase (a, b,
S e e table 3-7. sequence 9.
and c above). If distortion readings exceeded 6
b. P r o c e e d a s i n a a b o v e
for
the
following
percent,refer to table 3-7, sequence 10.3. Replace all
remaining tests:
wiring.
(1) For B phase data, monitor terminals 14, 15,
3-18. Systems Test Procedure
24, and 25 as in C phase data.
NOTE
(2) For A phase data, monitor terminals 26
S e e paragraphs 3-41 through 3-51 on unit
t h r o u g h 29 as in C phase data.
checkout.
(3) For A phase data, monitor terminals 28 and
a. Slowly increase input voltage to 28 vdc while
29 as in C phase data.
v i s u a l l y scanning test monitors.
( 4 ) Remove dc input power.
(1) Dc input current should increase to ap-
proximately 10 amperes then drop as input voltage is
Repeat this procedure for each phase.
increased.
a. Use clip leads to connect a resistor of 10 ohms
( 2 ) Ac output voltages should increase evenly
greater than 2 watts in series with pin E7 and +8
t o approximately 110 ac and then stabilize.
vdc power lead (red). Apply 28-vdc input power.
b. A f t e r a 5 - m i n u t e w a r m u p p e r i o d a t 2 8 - v d c
b. Monitor terminals 7 and 8 of T701A with dual
input voltage, adjust output voltage controls for 116
trace oscilloscope for presence of push-pull drive. If
v.
either signal is not present, repair appropriate
( 1 ) Adjust R228 on
A2
board for phase A.
circuit. See table 3-7, sequence 10. See waveform on
( 2 ) Adjust R309 on
A3
board for phase C.
figure 3-32.
( 3 ) Adjust R356 on
A3
board for phase B.
( 1 ) Monitor terminals 4 and 5 of T701B.
c. Test static inverter
as
follows:
(2) Monitor positive terminals of C706 for
( 1 ) If distortion is
out
of specified limits or
r e c t i f i e d output of T701. If signal is not present,
grossly different phase to phase, adjust decade
r e p a i r before proceeding. See table 3-7, sequence
resistance (in place of R442) for minimum distortion
10.4.
within a voltage range of + 6.5 to 8 vdc out of the dc
(3) Monitor positive terminal of C707 as in (2)
r e g u l a t o r circuit.
above.
(2) If distortion is still out of specified limits,
( 4 ) Remove power, remove resistor from +8 v
c o n n e c t capacitance trimmer fixture (para 3-41) in
p o w e r source, clip + 8 V d i r e c t t o p i n 7 . R e a p p l y
p l a c e of C617, C618, and C619 (fig. FO-1). Adjust
power and repeat (2) and (3) above. Upon completion
trimmer for approximately 4 percent distortion and
o f tests remove power.
m i n i m a l dc input current but do not exceed 0.5
c. Repeat a and b above for other A7 modules.
difference between phases of 40-ampere input at full
l o a d (resistive) and 28 v.
(3) If trimmer capacitors must be used,
a. For this test, make the following connections:
r e a d j u s t output voltage as required (b above).
( 1 ) Connect +8 vdc to pin E7 fo A7 phase A
d. I n s t a l l t r i m m e r c a p a c i t o r s C 6 1 7 , C 6 1 8 , a n d
with clip lead.
C619 in accordance with selection made in c ( 2 )
(2) Connect appropriate primary winding of
above. Install R442 in accordance with requirement
T 1 0 1 to output terminals 6 and 7 of A7 with clip
leads (fig. FO-7).
as indicated by resistance decade box setting.
Remove power.
b. M o n i t o r a n o d e s o f C R 7 0 3 a n d C R 0 7 0 4 w i t h
oscilloscope. Slowly increase input voltage while
observing input current and output voltage meters.
If requirements of preceding paragraphs have been
Input current should fold back at less than 10
met,
the major module troubleshooting test
amperes and output voltage should regulate at
procedure is complete. If not, correct deficient areas
approximately 110 vac. If not, repair before
in accordance with detailed troubleshooting
p r o c e e d i n g . See table 3-7, sequence 10.3.
t e c h n i q u e s as shown in table 3-7.
c. The waveform should approximate that shown
in figure FO- 1 for anode of CR703.
3-16
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