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Mainframe Computer Instruction Formats | Up
Fire Controlman Volume 03-Digital Data Systems | Next
INSTRUCTION OPERAND ADDRESSING |
Figure 8-5.—Illustrations of instruction word formats I, II, and III.
addressing designator (i), a 3-bit base designator or
are combined to define one of the following:
special selection code (s), and a 13-bit address dis-
operand, a constant that can be modified by an index, a
placement or operand designator (y). The b code (219
jump address, an indirect address, or a string of
through 217) is used to identify the index register (0-7)
identifier bits.
being used for indexing or operand address
Formats IV-A and IV-B —The formats are for
modification. The i code (216) is a ZERO when in
16-bit or half-word instructions. These instructions
direct addressing mode and a ONE when in indirect
reside in the upper or lower half-word of a memory
addressing mode. The s and y codes (215 through 20)
location. They are normally stored two to a memory
8-9
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