output  simultaneously.  When  the  computer  uses  a  serial configuration, all bits of information are input or output one at a time. I/O INSTRUCTIONS  —All computers have I/O instructions.  Command  instructions  are  executed  by the IOC under the control of the CPU’s main program. They  provide  control  over  IOC  single-and  dual-channel operations. A chain consists of IOC control words, command words, output data words, and specified locations for external status words and data words returned (input) from the channel. I/O OPERATIONS —Input/output operations are initiated by the CPU. Computers with an IOC begin I/O control  functions  only  after  an  initiate  I/O  or  equivalent instruction   is   executed   by   the   CPU.   Computer instructions inform the external equipment which type of operations to perform with function codes. They also specify  memory  areas  for  input  and  output  information. OPERATING MODES —I/O operations include both digital and linear ICs. The linear IC circuits are the first and last type of circuitry the information interfaces with when entering and leaving the computer. Registers in I/O operations provide the interfacing between the CPU, I/O, and memory. They enable and route  control  and  data  information  between  the  CPU, I/O, and memory using the internal bus system. The data registers are used to hold or buffer data during interchanges between the very fast CPU and the slower external   equipments. The  status  registers  hold information for the CPU that indicates the operating condition   and   current   activities   of   the   external equipments. I/O   FUNCTIONS   —The   input   and   output functions performed by an I/O processor are defined and  enabled  through  the  interpretation  and  execution  of input/output  and/or  input/output  controller  (I/O(C)) commands obtained from main memory. DIRECT  CPU  INTERFACE  —With  direct communication, also called accumulator-based I/O, the peripheral  devices  are  tied  directly  into  the  CPU communication bus (control bus, data bus, and so forth). In a simple I/O scheme, the CPU handles all I/O transactions by executing one or more instructions for each word of information transferred. DIRECT MEMORY ACCESS (DMA) —DMA allows blocks of information to be transferred directly in and out of memory and from and to an external device without   any   CPU   intervention. Information   is transferred at a speed compatible with that of the external device. A DMA controller is usually placed between the external device and the computer’s bus. I/O INTERFACING  —Computers may have a small  number  of  channels  or  ports  with  multiple equipments connected to each channel; or they may, particularly  in  larger  computers,  have  a  number  of  I/O channels  with  limited  numbers  or  types  of  external equipments on each channel or port. I/O INTERFACING STANDARDS —There are two  major  types  of  computer/external  equipment communication  formats:  serial  and  parallel.  The communication formats are governed by the standard that is identified by the interface. As a general rule, the standards   can   be   divided   into   four   categories: mechanical, electrical, functional, and procedural. I/O  INTERFACING  COMPONENTS  —The computer’s I/O processor must ensure that the voltage levels   between   the   computer   and   the   external equipments are compatible. The primary circuitry that accomplishes  this  is  located  on  an  I/O  pcb  or modules/pcb’s that make up an IOA. Some of the primary  I/O  interfacing  hardware  include  universal receiver-transmitters, line drivers, and line receivers. UNIVERSAL RECEIVER-TRANSMITTER — Within a digital computer, the data is transferred internally using a parallel format. All the bits of a byte or  memory  word  are  exchanged  simultaneously between registers, buses, and other computer logic. For the data to be communicated over a serial channel, it must be converted from parallel to a serial bit stream. The USART is designed to function as a peripheral device to the microprocessor. The actual conversion from serial to parallel or parallel to serial is performed by the USART and is transparent to the microprocessor. The  standard  USART  chip  is  comprised  of  logic circuits, which are connected by an internal data bus. LINE   DRIVERS/RECEIVERS   —The  line drivers/receivers are designed to send and receive signals over short or long distances using serial or parallel  format. Large  voltages  or  currents  are generated from small voltage or current using TTL or MOS  circuitry.  The  two  types  most  commonly  used  are single-ended and differential. I/O INTERFACE FORMATS —There is a variety of  serial  and  parallel  I/O  channel  formats.  Your computer’s  technical  manual  will  provide  the  standards to be used with the cabinet and cable connectors. They will match the standards that govern the requirements for parallel and serial interfacing. 7-37