Figure 2-4. Selected Waveform Diagrams.

11-5835-243-34/EE641-AA-MMl-010/E154

MTT/TO

31S3-4-110-1

from the interface as shown in waveform 1 of figure

b. Input Buffer. Line receiver AR7 is operated

2-4. The buffered signal is then used to drive J-K

with a high threshold for maximum noise immunity.

flip-flop U8. Figure 2-4 illustrates the waveforms

Resistors R40 and R41 (fig. FO-2) form the voltage

and timing relationship of selected signals on the

source for setting the threshold voltage at ap-

digital read/write card.

proximately +1.5 vdc. NRZ format data is received

Figure 2-4. Selected Waveform Diagrams.

2-7